Claims for Patent: 6,238,994
✉ Email this page to a colleague
Summary for Patent: 6,238,994
Title: | Method of creating a rough electrode (high surface area) from Ti and TiN and resulting article |
Abstract: | A technique for forming high surface area electrode or storage nodes for a capacitor and devices formed thereby, including depositing a first layer of conductive material on a substrate, such that a discontinuous later if formed. A second conductive material layer is deposited over the discontinuous first conductive material layer, such that the second conductive material layer grows or accumulates on the discontinuous first conductive material layer at a faster rate than on the exposed areas of the substrate in the discontinuous first conductive material layer to form a rough conductive material layer. |
Inventor(s): | Derderian; Garo J. (Boise, ID), Sandhu; Gurtej S. (Boise, ID) |
Assignee: | Micron Technology, Inc. (Boise, ID) |
Application Number: | 09/041,917 |
Patent Claims: |
1. A method of producing a storage node structure for a semiconductor capacitor, comprising:
providing a substrate assembly, said substrate assembly including a base layer of semiconductor material and at least one other layer formed on said base layer; depositing a discontinuous layer of a first conductive material on said substrate assembly so as to leave areas thereof exposed through said discontinuous layer of said first conductive material; selecting a second conductive material adapted to accumulate on said first conductive material at a faster rate than on said exposed areas of said substrate assembly; and depositing said second conductive material over said discontinuous layer of said first conductive material and said exposed areas of said substrate assembly to accumulate on said first conductive material at a faster rate than on said exposed areas of said substrate assembly. 2. The method of claim 1, further including forming a via in said at least one other layer and depositing said discontinuous layer of said first conductive material on at least one wall of said via. 3. The method of claim 1, wherein said substrate assembly comprises a capacitor structure and further including depositing said discontinuous layer of said first conductive material of at least one wall of said capacitor structure. 4. The method of claim 1, further including forming said at least one other layer of borophosphosilicate glass. 5. The method of claim 1, wherein depositing said discontinuous layer of said first conductive material is effected by a deposition technique selected from the group consisting of sputter deposition and chemical vapor deposition. 6. The method of claim 1, wherein depositing said second conductive material is effected by a deposition technique selected from the group consisting of sputter deposition and chemical vapor deposition. 7. The method of claim 1, further comprising depositing said discontinuous layer of said first conductive material as a titanium layer and depositing said second conductive material as a titanium nitride layer. 8. The method of claim 7, further comprising depositing said discontinuous layer of said first conductive material as a titanium layer with a collimated sputtering technique. 9. The method of claim 7, further comprising depositing said discontinuous layer of said first conductive material as a titanium layer at a temperature of between about 20 and 600.degree. C. 10. The method of claim 7, further comprising depositing said discontinuous layer of said first conductive material as a titanium layer at a temperature of between about 300 and 400.degree. C. 11. The method of claim 7, further comprising depositing said discontinuous layer of said first conductive material as a titanium layer at a pressure of between about 0.4 mTorr and 1.0 Torr. 12. The method of claim 7, further comprising depositing said layer of said second conductive material as a titanium layer at a pressure of about 0.6 mTorr. 13. The method of claim 7, further comprising depositing said second conductive material as a titanium nitride layer at a temperature of between about 300 and 500.degree. C. 14. The method of claim 7, further comprising depositing said second conductive material as a titanium nitride layer at a temperature of about 420.degree. C. 15. The method of claim 7, further comprising depositing said second conductive material as a titanium nitride layer at a pressure of between about 40 mTorr and 10 Torr. 16. The method of claim 7, further comprising depositing said second conductive material as a titanium nitride layer at a pressure of about 600 mTorr. 17. The method of claim 1, further including forming nodules of said second conductive material over segments of said first conductive material in said discontinuous layer. 18. The method of claim 17, further including forming said nodules of said second conductive material to diameters of about 500 angstroms. |
Make Better Decisions: Try a trial or see plans & pricing
Drugs may be covered by multiple patents or regulatory protections. All trademarks and applicant names are the property of their respective owners or licensors. Although great care is taken in the proper and correct provision of this service, thinkBiotech LLC does not accept any responsibility for possible consequences of errors or omissions in the provided data. The data presented herein is for information purposes only. There is no warranty that the data contained herein is error free. thinkBiotech performs no independent verification of facts as provided by public sources nor are attempts made to provide legal or investing advice. Any reliance on data provided herein is done solely at the discretion of the user. Users of this service are advised to seek professional advice and independent confirmation before considering acting on any of the provided information. thinkBiotech LLC reserves the right to amend, extend or withdraw any part or all of the offered service without notice.